Messages in this thread |  | | Date | Mon, 2 Apr 2018 20:34:03 +0800 | From | Alan Kao <> | Subject | Re: [PATCH v2 0/2] perf: riscv: Preliminary Perf Event Support on RISC-V |
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Sorry for the lack of version prefix in the title. This patchset should be version 2.
On Mon, Apr 02, 2018 at 08:31:22PM +0800, Alan Kao wrote: > This implements the baseline PMU for RISC-V platforms. > > To ease future PMU portings, a guide is also written, containing > perf concepts, arch porting practices and some hints. > > Changes in v2: > - Fix the bug reported by Alex, which was caused by not sufficient > initialization. Check https://lkml.org/lkml/2018/3/31/251 for the > discussion. > > Alan Kao (2): > perf: riscv: preliminary RISC-V support > perf: riscv: Add Document for Future Porting Guide > > Documentation/riscv/pmu.txt | 249 +++++++++++++++++++ > arch/riscv/Kconfig | 12 + > arch/riscv/include/asm/perf_event.h | 76 +++++- > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/perf_event.c | 468 ++++++++++++++++++++++++++++++++++++ > 5 files changed, 802 insertions(+), 4 deletions(-) > create mode 100644 Documentation/riscv/pmu.txt > create mode 100644 arch/riscv/kernel/perf_event.c > > -- > 2.16.2 >
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