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    Subject[PATCH 4.9 24/66] arm64: Move post_ttbr_update_workaround to C code
    Date
    4.9-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Mark Rutland <mark.rutland@arm.com>


    From: Marc Zyngier <marc.zyngier@arm.com>

    commit 95e3de3590e3f2358bb13f013911bc1bfa5d3f53 upstream.

    We will soon need to invoke a CPU-specific function pointer after changing
    page tables, so move post_ttbr_update_workaround out into C code to make
    this possible.

    Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: Will Deacon <will.deacon@arm.com>
    Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
    Signed-off-by: Mark Rutland <mark.rutland@arm.com> [v4.9 backport]
    Tested-by: Greg Hackmann <ghackmann@google.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/arm64/include/asm/assembler.h | 13 -------------
    arch/arm64/mm/context.c | 9 +++++++++
    arch/arm64/mm/proc.S | 3 +--
    3 files changed, 10 insertions(+), 15 deletions(-)

    --- a/arch/arm64/include/asm/assembler.h
    +++ b/arch/arm64/include/asm/assembler.h
    @@ -435,17 +435,4 @@ alternative_endif
    and \phys, \pte, #(((1 << (48 - PAGE_SHIFT)) - 1) << PAGE_SHIFT)
    .endm

    -/*
    - * Errata workaround post TTBR0_EL1 update.
    - */
    - .macro post_ttbr0_update_workaround
    -#ifdef CONFIG_CAVIUM_ERRATUM_27456
    -alternative_if ARM64_WORKAROUND_CAVIUM_27456
    - ic iallu
    - dsb nsh
    - isb
    -alternative_else_nop_endif
    -#endif
    - .endm
    -
    #endif /* __ASM_ASSEMBLER_H */
    --- a/arch/arm64/mm/context.c
    +++ b/arch/arm64/mm/context.c
    @@ -233,6 +233,15 @@ switch_mm_fastpath:
    cpu_switch_mm(mm->pgd, mm);
    }

    +/* Errata workaround post TTBRx_EL1 update. */
    +asmlinkage void post_ttbr_update_workaround(void)
    +{
    + asm(ALTERNATIVE("nop; nop; nop",
    + "ic iallu; dsb nsh; isb",
    + ARM64_WORKAROUND_CAVIUM_27456,
    + CONFIG_CAVIUM_ERRATUM_27456));
    +}
    +
    static int asids_init(void)
    {
    asid_bits = get_cpu_asid_bits();
    --- a/arch/arm64/mm/proc.S
    +++ b/arch/arm64/mm/proc.S
    @@ -139,8 +139,7 @@ ENTRY(cpu_do_switch_mm)
    isb
    msr ttbr0_el1, x0 // now update TTBR0
    isb
    - post_ttbr0_update_workaround
    - ret
    + b post_ttbr_update_workaround // Back to C code...
    ENDPROC(cpu_do_switch_mm)

    .pushsection ".idmap.text", "awx"

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