lkml.org 
[lkml]   [2018]   [Apr]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v4 07/22] iommu/vt-d: fix dev iotlb pfsid use
    Date
    PFSID should be used in the invalidation descriptor for flushing
    device IOTLBs on SRIOV VFs.

    Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
    ---
    drivers/iommu/dmar.c | 6 +++---
    drivers/iommu/intel-iommu.c | 16 +++++++++++++++-
    include/linux/intel-iommu.h | 5 ++---
    3 files changed, 20 insertions(+), 7 deletions(-)

    diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
    index accf5838..38bb90f 100644
    --- a/drivers/iommu/dmar.c
    +++ b/drivers/iommu/dmar.c
    @@ -1339,8 +1339,8 @@ void qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr,
    qi_submit_sync(&desc, iommu);
    }

    -void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 qdep,
    - u64 addr, unsigned mask)
    +void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid,
    + u16 qdep, u64 addr, unsigned mask)
    {
    struct qi_desc desc;

    @@ -1355,7 +1355,7 @@ void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 qdep,
    qdep = 0;

    desc.low = QI_DEV_IOTLB_SID(sid) | QI_DEV_IOTLB_QDEP(qdep) |
    - QI_DIOTLB_TYPE;
    + QI_DIOTLB_TYPE | QI_DEV_IOTLB_PFSID(pfsid);

    qi_submit_sync(&desc, iommu);
    }
    diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
    index d8058be..cae4042 100644
    --- a/drivers/iommu/intel-iommu.c
    +++ b/drivers/iommu/intel-iommu.c
    @@ -1459,6 +1459,19 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info)
    return;

    pdev = to_pci_dev(info->dev);
    + /* For IOMMU that supports device IOTLB throttling (DIT), we assign
    + * PFSID to the invalidation desc of a VF such that IOMMU HW can gauge
    + * queue depth at PF level. If DIT is not set, PFSID will be treated as
    + * reserved, which should be set to 0.
    + */
    + if (!ecap_dit(info->iommu->ecap))
    + info->pfsid = 0;
    + else if (pdev && pdev->is_virtfn) {
    + if (ecap_dit(info->iommu->ecap))
    + dev_warn(&pdev->dev, "SRIOV VF device IOTLB enabled without flow control\n");
    + info->pfsid = PCI_DEVID(pdev->physfn->bus->number, pdev->physfn->devfn);
    + } else
    + info->pfsid = PCI_DEVID(info->bus, info->devfn);

    #ifdef CONFIG_INTEL_IOMMU_SVM
    /* The PCIe spec, in its wisdom, declares that the behaviour of
    @@ -1524,7 +1537,8 @@ static void iommu_flush_dev_iotlb(struct dmar_domain *domain,

    sid = info->bus << 8 | info->devfn;
    qdep = info->ats_qdep;
    - qi_flush_dev_iotlb(info->iommu, sid, qdep, addr, mask);
    + qi_flush_dev_iotlb(info->iommu, sid, info->pfsid,
    + qdep, addr, mask);
    }
    spin_unlock_irqrestore(&device_domain_lock, flags);
    }
    diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
    index dfacd49..678a0f4 100644
    --- a/include/linux/intel-iommu.h
    +++ b/include/linux/intel-iommu.h
    @@ -504,9 +504,8 @@ extern void qi_flush_context(struct intel_iommu *iommu, u16 did, u16 sid,
    u8 fm, u64 type);
    extern void qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr,
    unsigned int size_order, u64 type);
    -extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 qdep,
    - u64 addr, unsigned mask);
    -
    +extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid,
    + u16 qdep, u64 addr, unsigned mask);
    extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);

    extern int dmar_ir_support(void);
    --
    2.7.4
    \
     
     \ /
      Last update: 2018-04-16 23:48    [W:4.410 / U:0.012 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site