Messages in this thread | | | Date | Wed, 07 Mar 2018 12:42:49 -0500 (EST) | Subject | Re: [PATCH net-next 2/4] net: stmmac: use correct barrier between coherent memory and MMIO | From | David Miller <> |
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From: Niklas Cassel <niklas.cassel@axis.com> Date: Wed, 7 Mar 2018 18:21:57 +0100
> Considering this, you can drop/revert: > 95eb930a40a0 ("net: stmmac: use correct barrier between coherent memory and MMIO") > or perhaps you want me to send a revert?
You must submit explicit patches to do a revert or any other change.
> After reverting 95eb930a40a0, we will still have a dma_wmb() _after_ the > last descriptor word write. You just explained that nothing else is needed > after the last descriptor word write, so I actually think that this last > barrier is superfluous.
You don't need one after the last descriptor write.
Look, you're only concerned with ordering within the descriptor writes.
So it's only about:
desc->a = x;
/* Write to 'a' must be visible to the hardware before 'b'. */ dma_wmb(); desc->b = y;
writel();
That's all that you need.
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