Messages in this thread | | | From | Eugeniy Paltsev <> | Subject | Re: [PATCH v2 1/2] dmaengine: Introduce DW AXI DMAC driver | Date | Mon, 5 Mar 2018 15:56:37 +0000 |
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On Mon, 2018-02-26 at 18:42 +0200, Andy Shevchenko wrote: > On Mon, Feb 26, 2018 at 4:56 PM, Eugeniy Paltsev > <Eugeniy.Paltsev@synopsys.com> wrote: > > > + chip->core_clk = devm_clk_get(chip->dev, "core-clk"); > > Does the name come from datasheet? > > > + chip->cfgr_clk = devm_clk_get(chip->dev, "cfgr-clk"); > > Ditto?
Yes, these names came from datasheet.
> > + } > > + /* Enable clk before accessing to registers */ > > + clk_prepare_enable(chip->cfgr_clk); > > + clk_prepare_enable(chip->core_clk); > > Each of them may fail. Is it okay?
As it is driver remove callback I guess it is okay.
> > +static const struct dev_pm_ops dw_axi_dma_pm_ops = { > > + SET_RUNTIME_PM_OPS(axi_dma_runtime_suspend, axi_dma_runtime_resume, NULL) > > +}; > > No system suspend?
Are you talking about SET_SYSTEM_SLEEP_PM_OPS? I don't implement these OPS as we don't have any platform which has DW AXI DMAC and supports sleeping - so I can't test them.
-- Eugeniy Paltsev | |