Messages in this thread | | | Date | Fri, 30 Mar 2018 12:26:21 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH 1/2] x86/mce: new centaur CPUs support MCE broadcasting |
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On Fri, Mar 30, 2018 at 05:53:41PM +0800, David Wang wrote: > This patch is used to tell the kernel that newer Centaur CPU support MCE > broadcasting. > > Signed-off-by: David Wang <davidwang@zhaoxin.com> > --- > arch/x86/kernel/cpu/mcheck/mce.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c > index 7065846..82b25e1 100644 > --- a/arch/x86/kernel/cpu/mcheck/mce.c > +++ b/arch/x86/kernel/cpu/mcheck/mce.c > @@ -1688,6 +1688,17 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) > if (c->x86 == 6 && c->x86_model == 45) > quirk_no_way_out = quirk_sandybridge_ifu; > } > + > + if (c->x86_vendor == X86_VENDOR_CENTAUR) { > + /* > + * All newer centaur CPUs support MCE broadcasting. Enable > + * synchronization with a one second timeout. > + */ > + if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model == 0xf && c->x86_mask >=0xe)) &&
Are some specs or manuals available somewhere on the web for those?
Thx.
-- Regards/Gruss, Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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