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    Subject[PATCH 4.14 026/101] clk: bcm2835: Protect sections updating shared registers
    Date
    4.14-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Boris Brezillon <boris.brezillon@bootlin.com>

    commit 7997f3b2df751aab0b8e60149b226a32966c41ac upstream.

    CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock
    handlers and must be accessed with ->regs_lock held.
    Update the sections where this protection is missing.

    Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
    Cc: <stable@vger.kernel.org>
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/clk/bcm/clk-bcm2835.c | 4 ++++
    1 file changed, 4 insertions(+)

    --- a/drivers/clk/bcm/clk-bcm2835.c
    +++ b/drivers/clk/bcm/clk-bcm2835.c
    @@ -653,8 +653,10 @@ static int bcm2835_pll_on(struct clk_hw
    ~A2W_PLL_CTRL_PWRDN);

    /* Take the PLL out of reset. */
    + spin_lock(&cprman->regs_lock);
    cprman_write(cprman, data->cm_ctrl_reg,
    cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);
    + spin_unlock(&cprman->regs_lock);

    /* Wait for the PLL to lock. */
    timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS);
    @@ -731,9 +733,11 @@ static int bcm2835_pll_set_rate(struct c
    }

    /* Unmask the reference clock from the oscillator. */
    + spin_lock(&cprman->regs_lock);
    cprman_write(cprman, A2W_XOSC_CTRL,
    cprman_read(cprman, A2W_XOSC_CTRL) |
    data->reference_enable_mask);
    + spin_unlock(&cprman->regs_lock);

    if (do_ana_setup_first)
    bcm2835_pll_write_ana(cprman, data->ana_reg_base, ana);

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