Messages in this thread | | | From | Linus Walleij <> | Date | Tue, 27 Mar 2018 15:15:28 +0200 | Subject | Re: [PATCH] pinctrl: uniphier: add UART hardware flow control pin-mux settings |
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On Mon, Mar 19, 2018 at 9:13 AM, Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote:
> UniPhier SoCs have the following pins for hardware flow control of UART: > XRTS, XCTS > and for modem control of UART: > XDTR, XDSR, XDCD, XRI > > The port number with the flow control is SoC-dependent. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Patch applied with Masahiro's ACK!
Yours, Linus Walleij
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