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    Subject[PATCH 4.4 047/134] ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
    Date
    4.4-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Geert Uytterhoeven <geert+renesas@glider.be>


    [ Upstream commit d13d4e063d4a08eb1686e890e9183dde709871bf ]

    The SSI-ALL gate clock is located in between the P clock and the
    individual SSI[0-9] clocks, hence the former should be listed as their
    parent.

    Fixes: bcde372254386872 ("ARM: shmobile: r8a7790: add MSTP10 support on DTSI")
    Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
    Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
    Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/arm/boot/dts/r8a7790.dtsi | 7 +++++--
    1 file changed, 5 insertions(+), 2 deletions(-)

    --- a/arch/arm/boot/dts/r8a7790.dtsi
    +++ b/arch/arm/boot/dts/r8a7790.dtsi
    @@ -1360,8 +1360,11 @@
    compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
    reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
    clocks = <&p_clk>,
    - <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
    - <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
    + <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7790_CLK_SSI_ALL>, <&mstp10_clks R8A7790_CLK_SSI_ALL>,
    <&p_clk>,
    <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
    <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,

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