lkml.org 
[lkml]   [2018]   [Mar]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 4.4 064/134] MIPS: r2-on-r6-emu: Fix BLEZL and BGTZL identification
    Date
    4.4-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>


    [ Upstream commit 5bba7aa4958e271c3ffceb70d47d3206524cf489 ]

    Fix the problem of inaccurate identification of instructions BLEZL and
    BGTZL in R2 emulation code by making sure all necessary encoding
    specifications are met.

    Previously, certain R6 instructions could be identified as BLEZL or
    BGTZL. R2 emulation routine didn't take into account that both BLEZL
    and BGTZL instructions require their rt field (bits 20 to 16 of
    instruction encoding) to be 0, and that, at same time, if the value in
    that field is not 0, the encoding may represent a legitimate MIPS R6
    instruction.

    This means that a problem could occur after emulation optimization,
    when emulation routine tried to pipeline emulation, picked up a next
    candidate, and subsequently misrecognized an R6 instruction as BLEZL
    or BGTZL.

    It should be said that for single pass strategy, the problem does not
    happen because CPU doesn't trap on branch-compacts which share opcode
    space with BLEZL/BGTZL (but have rt field != 0, of course).

    Signed-off-by: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
    Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtech.com>
    Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtech.com>
    Reported-by: Douglas Leung <douglas.leung@imgtec.com>
    Reviewed-by: Paul Burton <paul.burton@imgtec.com>
    Cc: james.hogan@imgtec.com
    Cc: petar.jovanovic@imgtec.com
    Cc: goran.ferenc@imgtec.com
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/15456/
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
    Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/mips/kernel/mips-r2-to-r6-emul.c | 14 ++++++++++++--
    1 file changed, 12 insertions(+), 2 deletions(-)

    --- a/arch/mips/kernel/mips-r2-to-r6-emul.c
    +++ b/arch/mips/kernel/mips-r2-to-r6-emul.c
    @@ -1097,10 +1097,20 @@ repeat:
    }
    break;

    - case beql_op:
    - case bnel_op:
    case blezl_op:
    case bgtzl_op:
    + /*
    + * For BLEZL and BGTZL, rt field must be set to 0. If this
    + * is not the case, this may be an encoding of a MIPS R6
    + * instruction, so return to CPU execution if this occurs
    + */
    + if (MIPSInst_RT(inst)) {
    + err = SIGILL;
    + break;
    + }
    + /* fall through */
    + case beql_op:
    + case bnel_op:
    if (delay_slot(regs)) {
    err = SIGILL;
    break;

    \
     
     \ /
      Last update: 2018-03-19 21:23    [W:2.942 / U:1.760 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site