| From | Greg Kroah-Hartman <> | Subject | [PATCH 4.9 009/241] ARM: dts: r8a7792: Remove unit-address and reg from integrated cache | Date | Mon, 19 Mar 2018 19:04:34 +0100 |
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4.9-stable review patch. If anyone has any objections, please let me know.
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From: Geert Uytterhoeven <geert+renesas@glider.be>
[ Upstream commit a0504f0880c11da301dc2b5a5135bd02376e367e ]
The Cortex-A15 cache controller is an integrated controller, and thus the device node representing it should not have a unit-addresses or reg property.
Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> --- arch/arm/boot/dts/r8a7792.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
--- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -58,9 +58,8 @@ next-level-cache = <&L2_CA15>; }; - L2_CA15: cache-controller@0 { + L2_CA15: cache-controller-0 { compatible = "cache"; - reg = <0>; cache-unified; cache-level = <2>; power-domains = <&sysc R8A7792_PD_CA15_SCU>;
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