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SubjectRe: [PATCH RFC 1/2] drivers/edac: Add L1 and L2 error detection for A53 and A57
On Wed, Mar 14, 2018 at 05:17:46PM -0700, York Sun wrote:
> Add error detection for A53 and A57 cores. Hardware error injection
> is supported on A53. Software error injection is supported on both.
> For hardware error injection on A53 to work, proper access to
> L2ACTLR_EL1, CPUACTLR_EL1 needs to be granted by EL3 firmware. This
> is done by making an SMC call in the driver. Failure to enable access
> disables hardware error injection. For error interrupt to work,
> another SMC call enables access to L2ECTLR_EL1. Failure to enable
> access disables interrupt for error reporting.
>
> Signed-off-by: York Sun <york.sun@nxp.com>
> ---
> .../devicetree/bindings/edac/cortex-arm64-edac.txt | 37 +
> arch/arm64/include/asm/cacheflush.h | 1 +
> arch/arm64/mm/cache.S | 35 +
> drivers/edac/Kconfig | 6 +
> drivers/edac/Makefile | 1 +
> drivers/edac/cortex_arm64_l1_l2.c | 741 +++++++++++++++++++++

I don't want per-functional unit EDAC drivers. Also, what happened to
talking to ARM people about designing a generic ARM64 EDAC driver?

If this is going to be it, then it should be called edac_arm64.c and it
should contain all the architectural RAS functionality in it.

--
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

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