Messages in this thread | | | From | Andy Shevchenko <> | Date | Tue, 13 Mar 2018 19:31:39 +0200 | Subject | Re: [PATCH 1/1] x86/platform/x86: Fix count of CHas on multi-pci-segment arches |
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On Tue, Mar 13, 2018 at 7:28 PM, Liang, Kan <kan.liang@linux.intel.com> wrote:
>>>>>> +#define SKX_CAPID6 0x9c
^^^ This needs a comment.
>>> It looks it doesn't use capability.
> $ lspci -nk -vvv -xx -s 16:1e.3 > 16:1e.3 0880: 8086:2083 (rev 04) > Subsystem: 8086:0000 > Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- > Stepping- SERR- FastB2B- DisINTx- > Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > <TAbort- <MAbort- >SERR- <PERR- INTx- > 00: 86 80 83 20 00 00 00 00 04 00 80 08 00 00 80 00 > 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00 > 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Pity.
-- With Best Regards, Andy Shevchenko
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