Messages in this thread |  | | Date | Thu, 1 Mar 2018 13:53:15 -0700 | From | Jason Gunthorpe <> | Subject | Re: [PATCH v2 00/10] Copy Offload in NVMe Fabrics with P2P PCI Memory |
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On Fri, Mar 02, 2018 at 07:40:15AM +1100, Benjamin Herrenschmidt wrote: > Also we need to be able to hard block MEMREMAP_WB mappings of non-RAM > on ppc64 (maybe via an arch hook as it might depend on the processor > family). Server powerpc cannot do cachable accesses on IO memory > (unless it's special OpenCAPI or nVlink, but not on PCIe).
I think you are right on this - even on x86 we must not create cachable mappings of PCI BARs - there is no way that works the way anyone would expect.
I think this series doesn't have a problem here only because it never touches the BAR pages with the CPU.
BAR memory should be mapped into the CPU as WC at best on all arches..
Jason
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