Messages in this thread | | | Date | Mon, 26 Feb 2018 11:25:57 +0100 | From | Maxime Ripard <> | Subject | Re: [PATCH 01/15] clk: sunxi-ng: Add check for minimal rate to NM PLLs |
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On Mon, Feb 26, 2018 at 05:43:01PM +0800, Chen-Yu Tsai wrote: > On Mon, Feb 26, 2018 at 5:38 PM, Maxime Ripard > <maxime.ripard@bootlin.com> wrote: > > Hi, > > > > On Sat, Feb 24, 2018 at 10:45:31PM +0100, Jernej Skrabec wrote: > >> Some NM PLLs doesn't work well when their output clock rate is set below > >> certain rate. > >> > >> Add support for that constrain. > > > > In such a case, you should round the rate to the minimum the clock can > > operate at, and not return an error. > > That's true for round_rate. But what's the expected behavior of set_rate? > AFAIK we presume all users call round_rate before set_rate, but that doesn't > seem to be true all the time.
One of the first things that happens during a set_rate is a round_rate: https://elixir.bootlin.com/linux/v4.16-rc3/source/drivers/clk/clk.c#L1873
Maxime
-- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com [unhandled content-type:application/pgp-signature] | |