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SubjectRe: [PATCH V2] PCI: Add ACS quirk for Ampere root ports
On Tue, Feb 20, 2018 at 07:19:27PM -0800, Feng Kan wrote:
> The Ampere Computing PCIe root port does not support ACS at this point.
> However, the hardware provides isolation and source validation through the
> SMMU. The stream ID generated by the PCIe ports contain both the
> bus/device/function number as well as the port ID in its 3 most significant
> bits. Turn on ACS but disable all the peer-to-peer features.
>
> Signed-off-by: Feng Kan <fkan@apm.com>

Applied to pci/virtualization for v4.17, thanks!

> ---
> V2 - Correct patch summary as per Bjorn's comment
>
> This is a rebranding of APM to Ampere, it is a change of vendor id
> and device id, all functionality stays the same as before.
>
> drivers/pci/quirks.c | 9 +++++++++
> include/linux/pci_ids.h | 1 +
> 2 files changed, 10 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index fc73401..57748a3 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4514,6 +4514,15 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
> /* APM X-Gene */
> { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },
> + /* Ampere Computing */
> + { PCI_VENDOR_ID_AMPERE, 0xE005, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_AMPERE, 0xE006, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_AMPERE, 0xE007, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_AMPERE, 0xE008, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_AMPERE, 0xE009, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> { 0 }
> };
>
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index a6b3066..c875d42 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -1333,6 +1333,7 @@
> #define PCI_DEVICE_ID_IMS_TT3D 0x9135
>
> #define PCI_VENDOR_ID_AMCC 0x10e8
> +#define PCI_VENDOR_ID_AMPERE 0x1def
>
> #define PCI_VENDOR_ID_INTERG 0x10ea
> #define PCI_DEVICE_ID_INTERG_1682 0x1682
> --
> 2.7.4
>

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