Messages in this thread | | | From | Alan Tull <> | Date | Wed, 14 Feb 2018 10:36:26 -0600 | Subject | Re: [PATCH v4 11/24] fpga: dfl: fme: add header sub feature support |
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On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao <hao.wu@intel.com> wrote:
Hi Hao,
Looks good.
> From: Kang Luwei <luwei.kang@intel.com> > > The Header Register set is always present for FPGA Management Engine (FME), > this patch implements init and uinit function for header sub feature and > introduce several read-only sysfs interfaces for the capability and status. > > Sysfs interfaces: > * /sys/class/fpga_region/<regionX>/<dfl-fme.x>/ports_num > Read-only. Number of ports implemented > > * /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_id > Read-only. Blue Bitstream (static FPGA region) identifier number. It contains > the detailed version and other information of this static FPGA region. > > * /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_metadata > Read-only. Blue Bitstream (static FPGA region) meta data. It contains the > synthesis date, seed and other information of this static FPGA region. > > Signed-off-by: Tim Whisonant <tim.whisonant@intel.com> > Signed-off-by: Enno Luebbers <enno.luebbers@intel.com> > Signed-off-by: Shiva Rao <shiva.rao@intel.com> > Signed-off-by: Christopher Rauer <christopher.rauer@intel.com> > Signed-off-by: Kang Luwei <luwei.kang@intel.com> > Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> > Signed-off-by: Wu Hao <hao.wu@intel.com> Acked-by: Alan Tull <atull@kernel.org>
Thanks, Alan
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