Messages in this thread Patch in this message | | | From | Daniel Schultz <> | Subject | [PATCH v2 2/2] net: phy: dp83867: Add documentation for CLK_OUT pin muxing | Date | Wed, 14 Feb 2018 13:23:39 +0100 |
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From: Wadim Egorov <w.egorov@phytec.de>
Add documentation of ti,clk-output-sel which can be used to select a specific clock for CLK_OUT.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Daniel Schultz <d.schultz@phytec.de> --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 02c4353..56060c0 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -25,6 +25,8 @@ Optional property: software needs to take when this pin is strapped in these modes. See data manual for details. + - ti,clk-output-sel - Muxing option for CLK_OUT pin - see dt-bindings/net/ti-dp83867.h + for applicable values. Note: ti,min-output-impedance and ti,max-output-impedance are mutually exclusive. When both properties are present ti,max-output-impedance -- 2.7.4
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