Messages in this thread Patch in this message | | | From | Dmitry Osipenko <> | Subject | [PATCH v6 12/21] memory: tegra: Use relaxed versions of readl/writel | Date | Sun, 9 Dec 2018 23:29:41 +0300 |
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There is no need for inserting of memory barriers to access registers of Memory Controller. Hence use the relaxed versions of the accessors.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/memory/tegra/mc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index 9856f085e487..887a3b07334f 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -26,13 +26,13 @@ static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset) { - return readl(mc->regs + offset); + return readl_relaxed(mc->regs + offset); } static inline void mc_writel(struct tegra_mc *mc, u32 value, unsigned long offset) { - writel(value, mc->regs + offset); + writel_relaxed(value, mc->regs + offset); } extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common; -- 2.19.1
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