Messages in this thread Patch in this message | | | Date | Tue, 4 Dec 2018 17:36:10 +0000 | From | Catalin Marinas <> | Subject | Re: [PATCH v6 10/24] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking |
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On Mon, Nov 12, 2018 at 11:57:01AM +0000, Julien Thierry wrote: > diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h > index 24692ed..e0a32e4 100644 > --- a/arch/arm64/include/asm/irqflags.h > +++ b/arch/arm64/include/asm/irqflags.h > @@ -18,7 +18,27 @@ > > #ifdef __KERNEL__ > > +#include <asm/alternative.h> > +#include <asm/cpufeature.h> > #include <asm/ptrace.h> > +#include <asm/sysreg.h> > + > + > +/* > + * When ICC_PMR_EL1 is used for interrupt masking, only the bit indicating > + * whether the normal interrupts are masked is kept along with the daif > + * flags. > + */ > +#define ARCH_FLAG_PMR_EN 0x1 > + > +#define MAKE_ARCH_FLAGS(daif, pmr) \ > + ((daif) | (((pmr) >> GIC_PRIO_STATUS_SHIFT) & ARCH_FLAG_PMR_EN)) > + > +#define ARCH_FLAGS_GET_PMR(flags) \ > + ((((flags) & ARCH_FLAG_PMR_EN) << GIC_PRIO_STATUS_SHIFT) \ > + | GIC_PRIO_IRQOFF) > + > +#define ARCH_FLAGS_GET_DAIF(flags) ((flags) & ~ARCH_FLAG_PMR_EN)
I wonder whether we could just use the PSR_I_BIT here to decide whether to set the GIC_PRIO_IRQ{ON,OFF}. We could clear the PSR_I_BIT in _restore_daif() with an alternative.
> +/* > + * CPU interrupt mask handling. > + */ > static inline void arch_local_irq_enable(void) > { > - asm volatile( > - "msr daifclr, #2 // arch_local_irq_enable" > - : > + unsigned long unmasked = GIC_PRIO_IRQON; > + > + asm volatile(ALTERNATIVE( > + "msr daifclr, #2 // arch_local_irq_enable\n" > + "nop", > + "msr_s " __stringify(SYS_ICC_PMR_EL1) ",%0\n" > + "dsb sy", > + ARM64_HAS_IRQ_PRIO_MASKING)
DSB needed here as well? I guess I'd have to read the GIC spec before asking again ;).
-- Catalin
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