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    Subject[PATCH v9 20/27] MIPS: jz4740: Add DTS nodes for the TCU drivers
    Date
    Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files.

    Signed-off-by: Paul Cercueil <paul@crapouillou.net>
    ---

    Notes:
    v5: New patch

    v6: Fix register lengths in watchdog/pwm nodes

    v7: No change

    v8: - Fix wrong start address for PWM node
    - Add system timer and clocksource sub-nodes

    v9: Drop timer and clocksource sub-nodes

    arch/mips/boot/dts/ingenic/jz4740.dtsi | 51 +++++++++++++++++++++++---
    arch/mips/boot/dts/ingenic/jz4770.dtsi | 59 ++++++++++++++++++++++++++++++
    arch/mips/boot/dts/ingenic/jz4780.dtsi | 67 ++++++++++++++++++++++++++++++----
    3 files changed, 164 insertions(+), 13 deletions(-)

    diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
    index 6fb16fd24035..b4ccca7204e8 100644
    --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
    +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
    @@ -1,5 +1,6 @@
    // SPDX-License-Identifier: GPL-2.0
    #include <dt-bindings/clock/jz4740-cgu.h>
    +#include <dt-bindings/clock/ingenic,tcu.h>

    / {
    #address-cells = <1>;
    @@ -45,12 +46,52 @@
    #clock-cells = <1>;
    };

    - watchdog: watchdog@10002000 {
    - compatible = "ingenic,jz4740-watchdog";
    - reg = <0x10002000 0x10>;
    + tcu: timer@10002000 {
    + compatible = "ingenic,jz4740-tcu";
    + reg = <0x10002000 0x1000>;
    + #address-cells = <1>;
    + #size-cells = <1>;
    + ranges = <0x0 0x10002000 0x1000>;

    - clocks = <&cgu JZ4740_CLK_RTC>;
    - clock-names = "rtc";
    + #clock-cells = <1>;
    +
    + clocks = <&cgu JZ4740_CLK_RTC
    + &cgu JZ4740_CLK_EXT
    + &cgu JZ4740_CLK_PCLK
    + &cgu JZ4740_CLK_TCU>;
    + clock-names = "rtc", "ext", "pclk", "tcu";
    +
    + interrupt-controller;
    + #interrupt-cells = <1>;
    +
    + interrupt-parent = <&intc>;
    + interrupts = <23 22 21>;
    +
    + watchdog: watchdog@0 {
    + compatible = "ingenic,jz4740-watchdog";
    + reg = <0x0 0xc>;
    +
    + clocks = <&tcu TCU_CLK_WDT>;
    + clock-names = "wdt";
    + };
    +
    + pwm: pwm@40 {
    + compatible = "ingenic,jz4740-pwm";
    + reg = <0x40 0x80>;
    +
    + #pwm-cells = <3>;
    +
    + clocks = <&tcu TCU_CLK_TIMER0
    + &tcu TCU_CLK_TIMER1
    + &tcu TCU_CLK_TIMER2
    + &tcu TCU_CLK_TIMER3
    + &tcu TCU_CLK_TIMER4
    + &tcu TCU_CLK_TIMER5
    + &tcu TCU_CLK_TIMER6
    + &tcu TCU_CLK_TIMER7>;
    + clock-names = "timer0", "timer1", "timer2", "timer3",
    + "timer4", "timer5", "timer6", "timer7";
    + };
    };

    rtc_dev: rtc@10003000 {
    diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi
    index 49ede6c14ff3..89c7a4b9773c 100644
    --- a/arch/mips/boot/dts/ingenic/jz4770.dtsi
    +++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi
    @@ -1,6 +1,7 @@
    // SPDX-License-Identifier: GPL-2.0

    #include <dt-bindings/clock/jz4770-cgu.h>
    +#include <dt-bindings/clock/ingenic,tcu.h>

    / {
    #address-cells = <1>;
    @@ -46,6 +47,64 @@
    #clock-cells = <1>;
    };

    + tcu: timer@10002000 {
    + compatible = "ingenic,jz4770-tcu";
    + reg = <0x10002000 0x1000>;
    + #address-cells = <1>;
    + #size-cells = <1>;
    + ranges = <0x0 0x10002000 0x1000>;
    +
    + #clock-cells = <1>;
    +
    + clocks = <&cgu JZ4770_CLK_RTC
    + &cgu JZ4770_CLK_EXT
    + &cgu JZ4770_CLK_PCLK
    + &cgu JZ4770_CLK_EXT>;
    + clock-names = "rtc", "ext", "pclk", "tcu";
    +
    + interrupt-controller;
    + #interrupt-cells = <1>;
    +
    + interrupt-parent = <&intc>;
    + interrupts = <27 26 25>;
    +
    + watchdog: watchdog@0 {
    + compatible = "ingenic,jz4740-watchdog";
    + reg = <0x0 0xc>;
    +
    + clocks = <&tcu TCU_CLK_WDT>;
    + clock-names = "wdt";
    + };
    +
    + pwm: pwm@40 {
    + compatible = "ingenic,jz4740-pwm";
    + reg = <0x40 0x80>;
    +
    + #pwm-cells = <3>;
    +
    + clocks = <&tcu TCU_CLK_TIMER0
    + &tcu TCU_CLK_TIMER1
    + &tcu TCU_CLK_TIMER2
    + &tcu TCU_CLK_TIMER3
    + &tcu TCU_CLK_TIMER4
    + &tcu TCU_CLK_TIMER5
    + &tcu TCU_CLK_TIMER6
    + &tcu TCU_CLK_TIMER7>;
    + clock-names = "timer0", "timer1", "timer2", "timer3",
    + "timer4", "timer5", "timer6", "timer7";
    + };
    +
    + ost: timer@e0 {
    + compatible = "ingenic,jz4770-ost";
    + reg = <0xe0 0x20>;
    +
    + clocks = <&tcu TCU_CLK_OST>;
    + clock-names = "ost";
    +
    + interrupts = <15>;
    + };
    + };
    +
    pinctrl: pin-controller@10010000 {
    compatible = "ingenic,jz4770-pinctrl";
    reg = <0x10010000 0x600>;
    diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
    index b03cdec56de9..9f45c075b4f8 100644
    --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
    +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
    @@ -1,5 +1,6 @@
    // SPDX-License-Identifier: GPL-2.0
    #include <dt-bindings/clock/jz4780-cgu.h>
    +#include <dt-bindings/clock/ingenic,tcu.h>
    #include <dt-bindings/dma/jz4780-dma.h>

    / {
    @@ -46,6 +47,64 @@
    #clock-cells = <1>;
    };

    + tcu: timer@10002000 {
    + compatible = "ingenic,jz4770-tcu";
    + reg = <0x10002000 0x1000>;
    + #address-cells = <1>;
    + #size-cells = <1>;
    + ranges = <0x0 0x10002000 0x1000>;
    +
    + #clock-cells = <1>;
    +
    + clocks = <&cgu JZ4780_CLK_RTCLK
    + &cgu JZ4780_CLK_EXCLK
    + &cgu JZ4780_CLK_PCLK
    + &cgu JZ4780_CLK_EXCLK>;
    + clock-names = "rtc", "ext", "pclk", "tcu";
    +
    + interrupt-controller;
    + #interrupt-cells = <1>;
    +
    + interrupt-parent = <&intc>;
    + interrupts = <27 26 25>;
    +
    + watchdog: watchdog@0 {
    + compatible = "ingenic,jz4780-watchdog";
    + reg = <0x0 0xc>;
    +
    + clocks = <&tcu TCU_CLK_WDT>;
    + clock-names = "wdt";
    + };
    +
    + pwm: pwm@40 {
    + compatible = "ingenic,jz4740-pwm";
    + reg = <0x40 0x80>;
    +
    + #pwm-cells = <3>;
    +
    + clocks = <&tcu TCU_CLK_TIMER0
    + &tcu TCU_CLK_TIMER1
    + &tcu TCU_CLK_TIMER2
    + &tcu TCU_CLK_TIMER3
    + &tcu TCU_CLK_TIMER4
    + &tcu TCU_CLK_TIMER5
    + &tcu TCU_CLK_TIMER6
    + &tcu TCU_CLK_TIMER7>;
    + clock-names = "timer0", "timer1", "timer2", "timer3",
    + "timer4", "timer5", "timer6", "timer7";
    + };
    +
    + ost: timer@e0 {
    + compatible = "ingenic,jz4770-ost";
    + reg = <0xe0 0x20>;
    +
    + clocks = <&tcu TCU_CLK_OST>;
    + clock-names = "ost";
    +
    + interrupts = <15>;
    + };
    + };
    +
    rtc_dev: rtc@10003000 {
    compatible = "ingenic,jz4780-rtc";
    reg = <0x10003000 0x4c>;
    @@ -239,14 +298,6 @@
    status = "disabled";
    };

    - watchdog: watchdog@10002000 {
    - compatible = "ingenic,jz4780-watchdog";
    - reg = <0x10002000 0x10>;
    -
    - clocks = <&cgu JZ4780_CLK_RTCLK>;
    - clock-names = "rtc";
    - };
    -
    nemc: nemc@13410000 {
    compatible = "ingenic,jz4780-nemc";
    reg = <0x13410000 0x10000>;
    --
    2.11.0
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