Messages in this thread Patch in this message | | | Date | Mon, 10 Dec 2018 14:59:31 +0000 | From | Catalin Marinas <> | Subject | Re: [PATCH v2 2/2] arm64: uaccess: Implement unsafe accessors |
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On Fri, Dec 07, 2018 at 08:38:11AM +0000, Julien Thierry wrote: > > > On 12/06/2018 06:25 PM, Catalin Marinas wrote: > > On Mon, Dec 03, 2018 at 01:55:18PM +0000, Julien Thierry wrote: > > > diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h > > > index 07c3408..cabfcae 100644 > > > --- a/arch/arm64/include/asm/uaccess.h > > > +++ b/arch/arm64/include/asm/uaccess.h > > > @@ -233,6 +233,23 @@ static inline void uaccess_enable_not_uao(void) > > > __uaccess_enable(ARM64_ALT_PAN_NOT_UAO); > > > } > > > +#define unsafe_user_region_active uaccess_region_active > > > +static inline bool uaccess_region_active(void) > > > +{ > > > + if (system_uses_ttbr0_pan()) { > > > + u64 ttbr; > > > + > > > + ttbr = read_sysreg(ttbr1_el1); > > > + return ttbr & TTBR_ASID_MASK; > > > > Nitpick: could write this in 1-2 lines. > > True, I can do that in 1 line. > > > > + } else if (cpus_have_const_cap(ARM64_ALT_PAN_NOT_UAO)) { > > > + return (read_sysreg(sctlr_el1) & SCTLR_EL1_SPAN) ? > > > + false : > > > + !read_sysreg_s(SYS_PSTATE_PAN); > > > + } > > > > ARM64_ALT_PAN_NOT_UAO implies ARM64_HAS_PAN which implies SCTLR_EL1.SPAN > > is 0 at run-time. Is this to cope with the case of being called prior to > > cpu_enable_pan()? > > > > Yes, the issue I can into is that for cpufeatures, .cpu_enable() callbacks > are called inside stop_machine() which obviously might_sleep and so attempts > to check whether user_access is on. But for features that get enabled before > PAN, the PAN bit will be set.
OK, so the PSTATE.PAN bit only makes sense when SCTLR_EL1.SPAN is 0, IOW the PAN hardware feature has been enabled. Maybe you could write it (together with some comment):
} else if (cpus_have_const_cap(ARM64_ALT_PAN_NOT_UAO) && !(read_sysreg(sctlr_el1) & SCTLR_EL1_SPAN)) { /* only if PAN is present and enabled */ return !read_sysreg_s(SYS_PSTATE_PAN) }
On the cpufeature.c side of things, it seems that we enable the static_branch before calling the cpu_enable. I wonder whether changing the order here would help with avoid the SCTLR_EL1 read (not sure what else it would break; cc'ing Suzuki).
-- Catalin
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