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    Subject[PATCHv2 04/12] Documentation/ABI: Add new node sysfs attributes
    Date
    Add the entries for primary cpu and memory node attributes.

    Signed-off-by: Keith Busch <keith.busch@intel.com>
    ---
    Documentation/ABI/stable/sysfs-devices-node | 34 ++++++++++++++++++++++++++++-
    1 file changed, 33 insertions(+), 1 deletion(-)

    diff --git a/Documentation/ABI/stable/sysfs-devices-node b/Documentation/ABI/stable/sysfs-devices-node
    index 3e90e1f3bf0a..8430d5b261f6 100644
    --- a/Documentation/ABI/stable/sysfs-devices-node
    +++ b/Documentation/ABI/stable/sysfs-devices-node
    @@ -90,4 +90,36 @@ Date: December 2009
    Contact: Lee Schermerhorn <lee.schermerhorn@hp.com>
    Description:
    The node's huge page size control/query attributes.
    - See Documentation/admin-guide/mm/hugetlbpage.rst
    \ No newline at end of file
    + See Documentation/admin-guide/mm/hugetlbpage.rst
    +
    +What: /sys/devices/system/node/nodeX/primary_cpu_nodelist
    +Date: December 2018
    +Contact: Keith Busch <keith.busch@intel.com>
    +Description:
    + The node list of CPUs that have primary access to this node's
    + memory. CPUs not in the list accessing this node's memory may
    + encounter a performance penalty.
    +
    +What: /sys/devices/system/node/nodeX/primary_cpu_nodemask
    +Date: December 2018
    +Contact: Keith Busch <keith.busch@intel.com>
    +Description:
    + The node map for CPUs that have primary access to this node's
    + memory. CPUs not in the list accessing this node's memory may
    + encounter a performance penalty.
    +
    +What: /sys/devices/system/node/nodeX/primary_mem_nodelist
    +Date: December 2018
    +Contact: Keith Busch <keith.busch@intel.com>
    +Description:
    + The list of memory nodes that this node has primary access.
    + Memory accesses from this node to nodes not in this list may
    + encounter a performance penalty.
    +
    +What: /sys/devices/system/node/nodeX/primary_mem_nodemask
    +Date: December 2018
    +Contact: Keith Busch <keith.busch@intel.com>
    +Description:
    + The map of memory nodes that this node has primary access.
    + Memory accesses from this node to nodes not in this map may
    + encounter a performance penalty.
    --
    2.14.4
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