Messages in this thread | | | Date | Fri, 9 Nov 2018 00:42:56 -0800 | From | Christoph Hellwig <> | Subject | Re: [PATCH 1/4] irqchip: sifive-plic: Pre-compute context hart base and enable base |
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On Mon, Oct 22, 2018 at 05:15:14PM +0530, Anup Patel wrote: > This patch does following optimizations: > 1. Pre-compute hart base for each context handler > 2. Pre-compute enable base for each context handler
Why?
> 3. Have enable lock for each context handler instead > of global plic_toggle_lock
Why? Also even if you want this it should be a separate patch.
> #define PRIORITY_BASE 0 > -#define PRIORITY_PER_ID 4 > +#define PRIORITY_PER_ID 4
Also please drop the random whitespace changes.
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