Messages in this thread | | | Subject | Re: omap5 fixing palmas IRQ_TYPE_NONE warning leads to gpadc timeouts | From | Santosh Shilimkar <> | Date | Mon, 26 Nov 2018 11:19:31 -0800 |
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On 11/26/2018 11:14 AM, Tony Lindgren wrote: > * Thierry Reding <treding@nvidia.com> [181126 10:14]: >> On Mon, Nov 19, 2018 at 09:14:06AM -0800, Tony Lindgren wrote: >>> Well so commit 7e9d474954f4 ("ARM: tegra: Correct polarity for >>> Tegra114 PMIC interrupt") states that tegra114 inverts the >>> polarity of the PMIC interrupt. So adding Jon and Thierry to Cc. >>> >>> So it seems that commit df545d1cd01a ("mfd: palmas: Provide >>> irq flags through DT/platform data") wrongly sets the >>> PALMAS_POLARITY_CTRL_INT_POLARITY on IRQ_TYPE_LEVEL_HIGH >>> while it should set it on IRQ_TYPE_LEVEL_LOW. >> >> Oops, sorry, you seem to have come to pretty much the same conclusion as >> I did. I think what we need to do is find a copy of the TRM and see what >> exactly the right behaviour is. Or we need to find someone that can take >> measurements of the PMIC interrupt pin. > > Yeah so either tegra inverts the PMIC interrupt twice now, > or we have also omap5 wkupgen also inverting the PMIC interrupt > once.. Santosh, do you remember if omap5 wkupgen might be > inverting the palmas interrupt? > From the memory, omap5 wakeupgen doesn't invert the irqlines and not anything specific to PMIC specially either.
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