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    Subject[PATCH v12 14/25] kasan, arm64: enable top byte ignore for the kernel
    Date
    Tag-based KASAN uses the Top Byte Ignore feature of arm64 CPUs to store a
    pointer tag in the top byte of each pointer. This commit enables the
    TCR_TBI1 bit, which enables Top Byte Ignore for the kernel, when tag-based
    KASAN is used.

    Reviewed-by: Andrey Ryabinin <aryabinin@virtuozzo.com>
    Reviewed-by: Dmitry Vyukov <dvyukov@google.com>
    Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
    ---
    arch/arm64/include/asm/pgtable-hwdef.h | 1 +
    arch/arm64/mm/proc.S | 8 +++++++-
    2 files changed, 8 insertions(+), 1 deletion(-)

    diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
    index 1d7d8da2ef9b..d43b870c39b3 100644
    --- a/arch/arm64/include/asm/pgtable-hwdef.h
    +++ b/arch/arm64/include/asm/pgtable-hwdef.h
    @@ -291,6 +291,7 @@
    #define TCR_A1 (UL(1) << 22)
    #define TCR_ASID16 (UL(1) << 36)
    #define TCR_TBI0 (UL(1) << 37)
    +#define TCR_TBI1 (UL(1) << 38)
    #define TCR_HA (UL(1) << 39)
    #define TCR_HD (UL(1) << 40)
    #define TCR_NFD1 (UL(1) << 54)
    diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
    index 2c75b0b903ae..d861f208eeb1 100644
    --- a/arch/arm64/mm/proc.S
    +++ b/arch/arm64/mm/proc.S
    @@ -47,6 +47,12 @@
    /* PTWs cacheable, inner/outer WBWA */
    #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA

    +#ifdef CONFIG_KASAN_SW_TAGS
    +#define TCR_KASAN_FLAGS TCR_TBI1
    +#else
    +#define TCR_KASAN_FLAGS 0
    +#endif
    +
    #define MAIR(attr, mt) ((attr) << ((mt) * 8))

    /*
    @@ -445,7 +451,7 @@ ENTRY(__cpu_setup)
    */
    ldr x10, =TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \
    TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \
    - TCR_TBI0 | TCR_A1
    + TCR_TBI0 | TCR_A1 | TCR_KASAN_FLAGS
    tcr_set_idmap_t0sz x10, x9

    /*
    --
    2.20.0.rc0.387.gc7a69e6b6c-goog
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