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    Subject[Patch v6 02/16] x86/speculation: Add X86_FEATURE_USE_IBRS_ENHANCED
    Date
    STIBP is not needed when enhanced IBRS is used for Spectre V2 mitigation.
    A CPU feature flag to indicate that enhanced IBRS is used will be handy
    for skipping STIBP for this case.

    Add X86_FEATURE_USE_IBRS_ENHANCED feature bit to indicate
    enhanced IBRS is used for Spectre V2 mitigation.

    Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
    ---
    arch/x86/include/asm/cpufeatures.h | 1 +
    arch/x86/kernel/cpu/bugs.c | 1 +
    2 files changed, 2 insertions(+)

    diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
    index 28c4a50..fe8e064 100644
    --- a/arch/x86/include/asm/cpufeatures.h
    +++ b/arch/x86/include/asm/cpufeatures.h
    @@ -221,6 +221,7 @@
    #define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */
    #define X86_FEATURE_L1TF_PTEINV ( 7*32+29) /* "" L1TF workaround PTE inversion */
    #define X86_FEATURE_IBRS_ENHANCED ( 7*32+30) /* Enhanced IBRS */
    +#define X86_FEATURE_USE_IBRS_ENHANCED ( 7*32+31) /* "" Enhanced IBRS enabled */

    /* Virtualization flags: Linux defined, word 8 */
    #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */
    diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
    index 91a754a..3a6f13b 100644
    --- a/arch/x86/kernel/cpu/bugs.c
    +++ b/arch/x86/kernel/cpu/bugs.c
    @@ -387,6 +387,7 @@ static void __init spectre_v2_select_mitigation(void)
    /* Force it so VMEXIT will restore correctly */
    x86_spec_ctrl_base |= SPEC_CTRL_IBRS;
    wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
    + setup_force_cpu_cap(X86_FEATURE_USE_IBRS_ENHANCED);
    goto specv2_set_mode;
    }
    if (IS_ENABLED(CONFIG_RETPOLINE))
    --
    2.9.4
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