Messages in this thread | | | Date | Mon, 19 Nov 2018 12:48:49 -0800 | Subject | Re: [PATCH] x86/TSC: Use RDTSCP | From | hpa@zytor ... |
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On November 19, 2018 12:40:25 PM PST, Borislav Petkov <bp@alien8.de> wrote: >On Mon, Nov 19, 2018 at 12:17:35PM -0800, H. Peter Anvin wrote: >> On 11/19/18 11:52 AM, Andy Lutomirski wrote: >> > >> > I thought I benchmarked this on Intel at some point and found the >> > LFENCE;RDTSC variant to be slightly faster. But I believe you, so: >> > >> > Acked-by: Andy Lutomirski <luto@kernel.org> >> > >> >> As long as the difference isn't significant, the simplicity would >seem to be a >> win. > >Right, I think by simplicity you mean RDTSCP. :) > >Also in the sense that you have a single instruction which gives you >that barrier of waiting for all older insns to retire before reading >the >TSC vs two where you don't necessarily know what happens on the uarch >level. I mean, nothing probably happens but RDTSCP is still simpler :) > >Also, hpa, isn't LFENCE; RDTSC and RDTSCP equivalent on Intel? In the >sense that RDTSCP microcode practically adds an LFENCE before reading >the TSC? > >Because SDM says: > >"The RDTSCP instruction is not a serializing instruction, but it does >wait until all previous instructions have executed and all previous >loads are globally visible." > >which sounds pretty much like an LFENCE to me: > >"LFENCE does not execute until all prior instructions have completed >locally, and no later instruction begins execution until LFENCE >completes."
I don't know the exact sequence of fencing operations it is equivalent to, but it is probably something quite similar. -- Sent from my Android device with K-9 Mail. Please excuse my brevity.
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