Messages in this thread | | | Subject | Re: [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks | From | Dave Hansen <> | Date | Thu, 15 Nov 2018 17:04:35 -0800 |
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On 11/15/18 4:21 PM, Li, Aubrey wrote: > On 2018/11/15 23:40, Dave Hansen wrote: >> On 11/14/18 3:00 PM, Aubrey Li wrote: >>> AVX-512 component has 3 states, only Hi16_ZMM state causes notable >>> frequency drop. Add per task Hi16_ZMM state tracking to context switch. >> >> Just curious, but is there any public documentation of this? It seems >> really odd to me that something using the same AVX-512 instructions on >> some low-numbered registers would behave differently than the same >> instructions on some high-numbered registers. I'm not saying this is >> wrong, but it's certainly counter-intuitive and I think that begs for >> some more explanation. > > Yes, Intel 64 and IA-32 Architectures software developer's Manual mentioned > this in performance event CORE_POWER.LVL2_TURBO_LICENSE. > > "Core cycles where the core was running with power delivery for license > level 2 (introduced in Skylake Server microarchitecture). This includes > high current AVX 512-bit instructions." > > I translated license level 2 to frequency drop.
OK, but that talks about AVX 512 and not specifically about Hi16_ZMM's impact which is what this patch measures. Are the Hi16_ZMM intricacies documented anywhere?
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