Messages in this thread |  | | Date | Sat, 6 Oct 2018 16:40:53 +0200 (CEST) | From | Thomas Gleixner <> | Subject | Re: [PATCH v1 2/2] perf/x86/kvm: Avoid unnecessary work in guest filtering |
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On Fri, 5 Oct 2018, Andi Kleen wrote: > Some time ago KVM added a workaround for PEBS events leaking > into guests. This uses the KVM entry/exit list to add an extra > disable of the PEBS_ENABLE MSR. > > Intel also added a fix for this issue to microcode updates on > Haswell/Broadwell/Skylake. > > It turns out using the MSR entry/exit list makes VM exits > significantly slower. The list is only needed for disabling > PEBS, because the GLOBAL_CTRL change gets optimized by > KVM into changing the VMCS. > > This patch checks for the microcode updates that have the microcode
# grep "This patch" Documentation/process
> fix for leaking PEBS, and disables the extra entry/exit list > entry for PEBS_ENABLE. In addition we always clear the > GLOBAL_CTRL for the PEBS counter while running in the guest, > which is enough to make them never fire at the wrong > side of the host/guest transition. > > +#define IUCODE(model, step, rev) \ > + { X86_VENDOR_INTEL, 6, model, step, rev, 0, 0 }
So we are going to have this kind of defines on every usage site. Please put these macros into the corresponding header file.
Also this wants to be named INTEL_MIN_UCODE() so it's clear what this is about.
Thanks,
tglx
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