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    SubjectRe: [PATCH v9 6/9] i3c: master: Add driver for Cadence IP
    On Wed, 24 Oct 2018 17:43:00 -0500
    Grygorii Strashko <grygorii.strashko@ti.com> wrote:

    > On 10/24/18 4:04 PM, Boris Brezillon wrote:
    > > On Wed, 24 Oct 2018 15:25:17 -0500
    > > Grygorii Strashko <grygorii.strashko@ti.com> wrote:
    > >
    > >> On 10/24/18 1:20 PM, Boris Brezillon wrote:
    > >>> Hi Arnd,
    > >>>
    > >>> On Mon, 22 Oct 2018 15:34:01 +0200
    > >>> Boris Brezillon <boris.brezillon@bootlin.com> wrote:
    > >>>
    > >>>
    > >>>> +
    > >>>> +static void cdns_i3c_master_rd_from_rx_fifo(struct cdns_i3c_master *master,
    > >>>> + u8 *bytes, int nbytes)
    > >>>> +{
    > >>>> + readsl(master->regs + RX_FIFO, bytes, nbytes / 4);
    > >>>
    > >>> Vitor reported a problem with readsl(): this function expects the 2nd
    > >>> argument to be aligned on 32-bit, which is not guaranteed here. Unless
    > >>> you see a better solution, I'll switch back to a loop doing:
    > >>>
    > >>> for (i = 0; i < nbytes; i += 4) {
    > >>> u32 tmp = __raw_readl(...);
    > >>
    > >> Pls, do not use __raw io.
    > >
    > > Except this is exactly what I want here, unless you have a
    > > replacement for "readl() without a mem-barrier and without endianness
    > > conversion"
    > >
    >
    > Not sure why endianness is the problem. readl_relaxed?

    Because we want to read a stream of bytes, and, if we have a CPU that is
    operating in big-endian (ARM kernels can configured in BE or LE), byte
    ordering will be messed up (the controller is LE).

    If I use readl_relaxed(), I'll then have to call cpu_to_le32(), and
    finally copy the result to the buffer.

    > Sry, I've missed that this is part of the driver not i3c core,
    > so minor/ignore.
    >

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