Messages in this thread | | | Date | Mon, 22 Oct 2018 20:19:18 +0200 | From | Andrew Lunn <> | Subject | Re: CRC errors between mvneta and macb |
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> I dug more on the subject, and I think I found what Marvell's PHY/MAC > doesn't like.
Hi Richard
What PHY is being used?
> After analyzing the ethernet frame on the Davicom PHY's output (pin > TX+), I find out that the FCS errors occurs when the ethernet preamble > is longer than 56bits. (something like 58 or 60 bits)
Some Marvell PHYs have a register bit which might be of interest: Page 2, register 16, bit 6.
0 = Pad odd nibble preambles in copper receive packets. 1 = Pass as is and do not pad odd nibble preambles in
Andrew
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