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    Subject[PATCH 4.18 171/228] bus: ti-sysc: Fix module register ioremap for larger offsets
    Date
    4.18-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Tony Lindgren <tony@atomide.com>

    [ Upstream commit 0ef8e3bb974af56346b34393e643d491d9141c66 ]

    We can have the interconnect target module control registers pretty
    much anywhere within the module range. The current code attempts an
    incomplete optimization of the ioremap size but does it wrong and
    it only works for registers at the beginning of the module.

    Let's just use the largest control register to calculate the ioremap
    size. The ioremapped range is for most part cached anyways so there
    is no need for size optimization. Let's also update the comments
    accordingly.

    Fixes: 0eecc636e5a2 ("bus: ti-sysc: Add minimal TI sysc interconnect
    target driver")
    Signed-off-by: Tony Lindgren <tony@atomide.com>
    Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/bus/ti-sysc.c | 29 +++++++++++++----------------
    1 file changed, 13 insertions(+), 16 deletions(-)

    --- a/drivers/bus/ti-sysc.c
    +++ b/drivers/bus/ti-sysc.c
    @@ -490,32 +490,29 @@ static int sysc_check_registers(struct s

    /**
    * syc_ioremap - ioremap register space for the interconnect target module
    - * @ddata: deviec driver data
    + * @ddata: device driver data
    *
    * Note that the interconnect target module registers can be anywhere
    - * within the first child device address space. For example, SGX has
    - * them at offset 0x1fc00 in the 32MB module address space. We just
    - * what we need around the interconnect target module registers.
    + * within the interconnect target module range. For example, SGX has
    + * them at offset 0x1fc00 in the 32MB module address space. And cpsw
    + * has them at offset 0x1200 in the CPSW_WR child. Usually the
    + * the interconnect target module registers are at the beginning of
    + * the module range though.
    */
    static int sysc_ioremap(struct sysc *ddata)
    {
    - u32 size = 0;
    + int size;

    - if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
    - size = ddata->offsets[SYSC_SYSSTATUS];
    - else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
    - size = ddata->offsets[SYSC_SYSCONFIG];
    - else if (ddata->offsets[SYSC_REVISION] >= 0)
    - size = ddata->offsets[SYSC_REVISION];
    - else
    - return -EINVAL;
    + size = max3(ddata->offsets[SYSC_REVISION],
    + ddata->offsets[SYSC_SYSCONFIG],
    + ddata->offsets[SYSC_SYSSTATUS]);

    - size &= 0xfff00;
    - size += SZ_256;
    + if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
    + return -EINVAL;

    ddata->module_va = devm_ioremap(ddata->dev,
    ddata->module_pa,
    - size);
    + size + sizeof(u32));
    if (!ddata->module_va)
    return -EIO;


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