Messages in this thread | | | Subject | Re: [PATCH net-next 2/5] net: phy: mscc: Add EEE init sequence | From | Florian Fainelli <> | Date | Mon, 1 Oct 2018 09:27:10 -0700 |
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On 10/01/2018 01:51 AM, Quentin Schulz wrote: > Hi Florian, > > On Fri, Sep 14, 2018 at 07:21:09PM -0700, Florian Fainelli wrote: >> >> >> On 09/14/18 01:33, Quentin Schulz wrote: >>> From: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> >>> >>> Microsemi PHYs (VSC 8530/31/40/41) need to update the Energy Efficient >>> Ethernet initialization sequence. >>> In order to avoid certain link state errors that could result in link >>> drops and packet loss, the physical coding sublayer (PCS) must be >>> updated with settings related to EEE in order to improve performance. >>> >>> Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> >>> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> >>> --- >> >> [snip] >> >>> + vsc85xx_tr_write(phydev, 0x0f82, 0x0012b00a); >> >> Can you just make this an array of register + value pair? That would be > > Sure, I'll. > >> less error prone in case you need to update that sequence in the future. >> > > I'm curious about the kind of errors you're worrying about or have > experienced. Do you have any particular example or thought in mind?
Since this is just a completely non documented sequence likely given as-is by the vendor, there could be in the future an arbitrary number of changes made to that sequence because reasons. It seems to me that putting that sequence in an array, instead of having to produce the right sequence of calls, inlined in the source, is more manageable, and will lead to an easier process if back porting/forward porting is necessary. -- Florian
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