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SubjectRe: [RFC PATCH v2 2/6] x86/arch_prctl: add ARCH_GET_NOPTI and ARCH_SET_NOPTI to enable/disable PTI
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Has anyone else noticed that CR3 in oopses is now basically a lie with
PTI? It shows CR3 at the time of the printing of the oops, not at the
time of the fault like the normal registers. That greatly limits its
usefulness in the dumps with PTI.

Should we carve out some space somewhere to stash it at entry so we can
dump it in oopses? Any preferences on where? We need somewhere to
write that's before the SWITCH_TO_KERNEL_CR3, most likely so
cpu_entry_area is a candidate. The trampoline stack should also have space.

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