Messages in this thread | | | Date | Mon, 8 Jan 2018 17:18:05 +0100 | From | Ingo Molnar <> | Subject | Re: [PATCHv6 0/4] x86: 5-level related changes into decompression code<Paste> |
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* Kirill A. Shutemov <kirill@shutemov.name> wrote:
> On Tue, Dec 12, 2017 at 04:57:35PM +0300, Kirill A. Shutemov wrote: > > Here's few changes to x86 decompression code. > > > > The first patch is pure cosmetic change: it gives file with KASLR helpers > > a proper name. > > > > The last three patches bring support of booting into 5-level paging mode if > > a bootloader put the kernel above 4G. > > > > Patch 2/4 Renames l5_paging_required() into paging_prepare() and change > > interface of the function. > > Patch 3/4 Handles allocation of space for trampoline and gets it prepared. > > Patch 4/4 Gets trampoline used. > > > > Kirill A. Shutemov (4): > > x86/boot/compressed/64: Rename pagetable.c to kaslr_64.c > > x86/boot/compressed/64: Introduce paging_prepare() > > x86/boot/compressed/64: Prepare trampoline memory > > x86/boot/compressed/64: Handle 5-level paging boot if kernel is above > > 4G > > Ingo, does it look fine now?
Yes, it looks structurally much better now - but we first need to address all existing regressions before we can move forward.
( Also, the PTI work created a bit of a distraction as well, but x86 patch integration should should be back to speed soon. )
Thanks,
Ingo
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