Messages in this thread | | | Subject | Re: [PATCH v6 11/10] x86/retpoline: Avoid return buffer underflows on context switch II | Date | Tue, 9 Jan 2018 01:23:19 +0000 | From | "Woodhouse, David" <> |
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On Mon, 2018-01-08 at 17:21 -0800, Andi Kleen wrote: > On Mon, Jan 08, 2018 at 05:16:02PM -0800, Andi Kleen wrote: > > > If we clear the registers, what the hell are you going to put in the > > > RSB that helps you? > > > > RSB allows you to control chains of gadgets. > > I admit the gadget thing is a bit obscure. > > There's another case we were actually more worried about: > > On Skylake and Broadwell when the RSB underflows it will fall back to the > indirect branch predictor, which can be poisoned and we try to avoid > using with retpoline. So we try to avoid underflows, and this filling > helps us with that.
That's no longer true for Broadwell with the latest microcode, right?
And is why we *were* talking about using retpoline only for pre- Skylake, and using IBRS on Skylake onwards (where IBRS isn't quite so horribly slow anyway). [unhandled content-type:application/x-pkcs7-signature] | |