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SubjectRe: [PATCH v5 2/5] KVM: x86: Add IBPB support
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On 01/31/2018 09:28 PM, Konrad Rzeszutek Wilk wrote:
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> index d46a61b..2e4e8af 100644
>> --- a/arch/x86/kvm/vmx.c
>> +++ b/arch/x86/kvm/vmx.c
>> @@ -2285,6 +2285,7 @@ static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
>> if (per_cpu(current_vmcs, cpu) != vmx->loaded_vmcs->vmcs) {
>> per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs;
>> vmcs_load(vmx->loaded_vmcs->vmcs);
>> + indirect_branch_prediction_barrier();
>> }
>>
>> if (!already_loaded) {
>> @@ -3342,6 +3343,26 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>> case MSR_IA32_TSC:
>> kvm_write_tsc(vcpu, msr_info);
>> break;
>> + case MSR_IA32_PRED_CMD:
>> + if (!msr_info->host_initiated &&
>> + !guest_cpuid_has(vcpu, X86_FEATURE_IBPB) &&
>> + !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))
>> + return 1;
>> +
>> + if (data & ~PRED_CMD_IBPB)
>> + return 1;
>> +
>> + if (!data)
>> + break;
>> +
>> + wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);
>> +
>> + if (is_guest_mode(vcpu))
>> + break;
>
> Don't you want this the other way around? That is first do the disable_intercept
> and then add the 'if (is_guest_mode(vcpu))' ? Otherwise the very first
> MSR write from the guest is going to hit condition above and never end
> up executing the disabling of the intercept?

is_guest_mode is checking if this is an L2 guest. I *should not* do
disable_intercept on the L1 guest bitmap if it is an L2 guest that is
why this check happens before disable_intercept.

For the short-circuited L2 path, nested_vmx_merge_msr_bitmap will
properly update the L02 MSR bitmap and use it.

So the checks are fine AFAICT.

>
>> +
>> + vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap, MSR_IA32_PRED_CMD,
>> + MSR_TYPE_W);
>> + break;
>> case MSR_IA32_CR_PAT:
>> if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
>> if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data))
>
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