Messages in this thread | | | Subject | Re: [PATCH 13/16] arm64: Add support for checking errata based on a list of MIDRS | From | Suzuki K Poulose <> | Date | Fri, 26 Jan 2018 15:57:44 +0000 |
| |
On 26/01/18 14:16, Dave Martin wrote: > On Tue, Jan 23, 2018 at 12:28:06PM +0000, Suzuki K Poulose wrote: >> Add helpers for detecting an errata on list of midr ranges >> of affected CPUs. > > This doesn't describe what the patch does: instead, helpers are being > added for checking whether an MIDR falls in one of multiple affected > model(s) and or revision(s). > > Doing this makes sense, but is it really worth it?
Well, we need th MIDR list helpers anyway for other things: - White list of CPUs where we know KPTI is not needed - Black list of CPUs where DBM shouldn't be enabled.
So all we do is add a new type which could reduce the number of entries.
> > We might save 100-200 bytes in the kernel image for now, but a common > workaround for errata on multiple unrelated cpus is surely a rare case. > > Only if there are many such lists, or if the lists become large does > this start to seem a clear win. > >> >> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> >> --- >> arch/arm64/include/asm/cpufeature.h | 1 + >> arch/arm64/kernel/cpu_errata.c | 40 ++++++++++++++++++++++--------------- >> 2 files changed, 25 insertions(+), 16 deletions(-) >> >> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h >> index a3d54c2c411f..70712de687c7 100644 >> --- a/arch/arm64/include/asm/cpufeature.h >> +++ b/arch/arm64/include/asm/cpufeature.h > > [...] > >> @@ -330,22 +353,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { >> #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR >> { >> .capability = ARM64_HARDEN_BRANCH_PREDICTOR, >> - ERRATA_MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), >> - .enable = enable_psci_bp_hardening, >> - }, >> - { >> - .capability = ARM64_HARDEN_BRANCH_PREDICTOR, >> - ERRATA_MIDR_ALL_VERSIONS(MIDR_CORTEX_A72), >> - .enable = enable_psci_bp_hardening, >> - }, >> - { >> - .capability = ARM64_HARDEN_BRANCH_PREDICTOR, >> - ERRATA_MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), >> - .enable = enable_psci_bp_hardening, >> - }, >> - { >> - .capability = ARM64_HARDEN_BRANCH_PREDICTOR, >> - ERRATA_MIDR_ALL_VERSIONS(MIDR_CORTEX_A75), >> + ERRATA_MIDR_RANGE_LIST(cortex_bp_harden_cpus), > > Could we just use a macro to generate multiple structs, instead of > inventing a new type of struct?
We could. Somehow, I don't think we are over engineering much here.
Cheers Suzuki
| |