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SubjectRe: [RESEND PATCH V2 3/4] perf/x86/intel: drain PEBS buffer in event read
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On 1/18/2018 4:49 AM, Jiri Olsa wrote:
> On Tue, Jan 16, 2018 at 01:49:13PM -0500, Liang, Kan wrote:
>>
>>
>> On 1/11/2018 10:45 AM, Jiri Olsa wrote:
>>> On Thu, Jan 11, 2018 at 10:21:25AM -0500, Liang, Kan wrote:
>>>
>>> SNIP
>>>
>>>>>
>>>>> hum, but the PEBS drain is specific just for
>>>>> PERF_X86_EVENT_AUTO_RELOAD events, right?
>>>>
>>>> Accurately, PEBS drain is specific for PERF_X86_EVENT_FREERUNNING here.
>>>> PERF_X86_EVENT_FREERUNNING event must be _AUTO_RELOAD event.
>>>> But in some cases, _AUTO_RELOAD event cannot be _FREERUNNING event.
>>>>
>>>> Only the event which is both _FREERUNNING and _AUTO_RELOAD need to do PEBS
>>>> drain in _read().
>>>>
>>>> So it does the check in intel_pmu_pebs_read()
>>>> + if (pebs_needs_sched_cb(cpuc))
>>>> + return intel_pmu_drain_pebs_buffer();
>>>>
>>>>>
>>>>> wrt readability maybe you could add function like:
>>>>
>>>> The existing function pebs_needs_sched_cb() can do the check.
>>>> We just need to expose it, and also the intel_pmu_drain_pebs_buffer().
>>>>
>>>> But to be honest, I still cannot see a reason for that.
>>>> It could save a call to intel_pmu_pebs_read(), but _read() is not critical
>>>> path. It doesn't save much.
>>>
>>> hum, pmu->read is also called for PERF_SAMPLE_READ for sample,
>>> check perf_output_read
>>>
>>> for non sampling event you shouldn't be able to create PEBS
>>> event, there's check in x86_pmu_hw_config
>>>
>>> I agree it does not save much, it just confused me while
>>> I was reading the code, like why is this needed for all
>>> events with precise_ip
>>>
>>
>>
>> Sorry for the late response.
>>
>> How about the patch as below?
>> The patch will be split into two patches in V3. One is to introduce
>> intel_pmu_large_pebs_read, the other is to introduce intel_pmu_read_event.
>>
>> Thanks,
>> Kan
>>
>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>> index 731153a..1610a9d 100644
>> --- a/arch/x86/events/intel/core.c
>> +++ b/arch/x86/events/intel/core.c
>> @@ -2060,6 +2060,14 @@ static void intel_pmu_del_event(struct perf_event
>> *event)
>> intel_pmu_pebs_del(event);
>> }
>>
>> +static void intel_pmu_read_event(struct perf_event *event)
>> +{
>> + if (intel_pmu_large_pebs_read(event))
>> + return;
>
> should this be 'if (!intel_pmu_large_pebs_read(event))'
>

NO. For large pebs, the event->count has been updated in drain_pebs().
So it doesn't need to do x86_perf_event_update() again.

Thanks,
Kan


> but looks better for me without the precise_ip check
>
> thanks,
> jirka
>

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