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SubjectRe: [PATCH 3/8] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to the guest
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Thanks, Jim. Highly appreciated.

Jim Mattson <jmattson@google.com> wrote:

> Nadav,
>
> See section 2.5.1.2 (paragraph 3) in
> https://software.intel.com/sites/default/files/managed/c5/63/336996-Speculative-Execution-Side-Channel-Mitigations.pdf.
>
> On Tue, Jan 9, 2018 at 9:03 PM, Nadav Amit <nadav.amit@gmail.com> wrote:
>> Paolo Bonzini <pbonzini@redhat.com> wrote:
>>
>>> On 09/01/2018 17:48, Liran Alon wrote:
>>>>>> + if (have_spec_ctrl) {
>>>>>> + rdmsrl(MSR_IA32_SPEC_CTRL, vmx->spec_ctrl);
>>>>>> + if (vmx->spec_ctrl != 0)
>>>>>> + wrmsrl(MSR_IA32_SPEC_CTRL, 0);
>>>>
>>>> As I said also on the AMD patch, I think this is a bug.
>>>> Intel specify that we should set IBRS bit even if it was already set on every #VMExit.
>>>
>>> That's correct (though I'd like to understand _why_---I'm not inclined
>>> to blindly trust a spec), but for now it's saving a wrmsr of 0. That is
>>> quite obviously okay, and will be also okay after the bare-metal IBRS
>>> patches.
>>>
>>> Of course the code will become something like
>>>
>>> if (using_ibrs || vmx->spec_ctrl != 0)
>>> wrmsrl(MSR_IA32_SPEC_CTRL, host_ibrs);
>>>
>>> optimizing the case where the host is using retpolines.
>>
>> Excuse my ignorance: Can you point me to the specifications that mention “we
>> should set IBRS bit even if it was already set on every #VMExit” ?
>>
>> Thanks,
>> Nadav


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