Messages in this thread Patch in this message | | | From | Stefan Brüns <> | Subject | [PATCH 06/10] arm64: allwinner: a64: Add devicetree binding for DMA controller | Date | Mon, 4 Sep 2017 00:40:57 +0200 |
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The A64 is register compatible with the H3, but has a different number of dma channels and request ports.
Attach additional properties to the node to allow future reuse of the compatible for controllers with different number of channels/requests.
If dma-requests is not specified, the register layout defined maximum of 32 is used.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> --- .../devicetree/bindings/dma/sun6i-dma.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt index 6b267045f522..66195fb31296 100644 --- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt +++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt @@ -26,6 +26,32 @@ Example: #dma-cells = <1>; }; +------------------------------------------------------------------------------ +For A64 DMA controller: + +Required properties: +- compatible: "allwinner,sun50i-a64-dma" +- dma-channels: Number of DMA channels supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt +- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells + +Optional properties: +- dma-requests: Number of DMA request signals supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt + +Example: + dma: dma-controller@01c02000 { + compatible = "allwinner,sun50i-a64-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMA>; + dma-channels = <8>; + dma-requests = <27>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; +------------------------------------------------------------------------------ + Clients: DMA clients connected to the A31 DMA controller must use the format -- 2.14.1
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