Messages in this thread | | | Date | Fri, 29 Sep 2017 20:53:16 +0200 | From | Andrew Lunn <> | Subject | Re: [PATCH RFC 3/5] Add KSZ8795 switch driver |
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> My concern is if a task is already running with SPI access to a lot > of registers like reading the 32 MIB counters in every port of the > switch, another register access has to wait until they are finished.
Why does it have to wait? Looking at the code in ksz_get_ethtool_stats(), you don't take any mutex which will prevent others from using the SPI bus. All there is is a mutex which prevents two sets of ksz_get_ethtool_stats() at the same time.
So a PTP read could happen in parallel, and will not be blocked by MIB reads. They should get interleaved access to the SPI bus.
Andrew
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