Messages in this thread | | | Date | Tue, 8 Aug 2017 08:29:52 +0100 | From | Lee Jones <> | Subject | Re: [PATCH] mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell |
| |
On Fri, 28 Jul 2017, Mika Westerberg wrote:
> At least on Lenovo Thinkpad Yoga, the BIOS seems to monitor the SPI-NOR > write protection bit and if it is flipped to read/write it assumes the > BIOS configuration was changed on next reboot. It then, for unknown > reasons, resets the BIOS settings back to default. > > We can prevent this by just leaving the write protection bit intact and > let the SPI-NOR driver know whether the device is writable or not. In > case of this particular Lenovo the SPI-NOR flash will be exposed as > read-only. > > Fixes: ff00d7a32a1b ("mfd: lpc_ich: Add support for SPI serial flash host controller") > Link: https://bugzilla.kernel.org/show_bug.cgi?id=195951 > Reported-by: Abdó Roig-Marange <abdo.roig@gmail.com> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > --- > drivers/mfd/lpc_ich.c | 10 ---------- > 1 file changed, 10 deletions(-)
Applied, thanks.
> diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c > index 773f1554d2f9..450ae36645aa 100644 > --- a/drivers/mfd/lpc_ich.c > +++ b/drivers/mfd/lpc_ich.c > @@ -1119,17 +1119,7 @@ static int lpc_ich_init_spi(struct pci_dev *dev) > res->start = spi_base + SPIBASE_LPT; > res->end = res->start + SPIBASE_LPT_SZ - 1; > > - /* > - * Try to make the flash chip writeable now by > - * setting BCR_WPD. It it fails we tell the driver > - * that it can only read the chip. > - */ > pci_read_config_dword(dev, BCR, &bcr); > - if (!(bcr & BCR_WPD)) { > - bcr |= BCR_WPD; > - pci_write_config_dword(dev, BCR, bcr); > - pci_read_config_dword(dev, BCR, &bcr); > - } > info->writeable = !!(bcr & BCR_WPD); > } > break;
-- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog
| |