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SubjectRe: [PATCH] serial: Do not treat the IIR register as a bitfield
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On Thursday 30 March 2017 12:13 PM, Olliver Schinagl wrote:
>
>
> On March 30, 2017 8:15:29 AM CEST, Vignesh R <vigneshr@ti.com> wrote:
>> Hi,
>>
>> On Thursday 30 March 2017 12:14 AM, Olliver Schinagl wrote:
>>> diff --git a/include/uapi/linux/serial_reg.h
>> b/include/uapi/linux/serial_reg.h
>>> index 5db76880b4ad..489522389a10 100644
>>> --- a/include/uapi/linux/serial_reg.h
>>> +++ b/include/uapi/linux/serial_reg.h
>>> @@ -31,18 +31,18 @@
>>> #define UART_IERX_SLEEP 0x10 /* Enable sleep mode */
>>>
>>> #define UART_IIR 2 /* In: Interrupt ID Register */
>>> -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
>>> -#define UART_IIR_ID 0x0e /* Mask for the interrupt ID */
>>> #define UART_IIR_MSI 0x00 /* Modem status interrupt */
>>> +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
>>> #define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
>>> #define UART_IIR_RDI 0x04 /* Receiver data interrupt */
>>> #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
>>> -
>>> #define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */
>>> +#define UART_IIR_RX_TIMEOUT 0x0c /* DesignWare RX Timeout interrupt
>> */
> It was moved due to sorting. The comment could be changed maybe? I renamed it from omap to dw as i believe the omap also uses the dw ip. But i think it is a defacto standard mapping of the irr register?

AFAIK, OMAP UART does not use DW core, please make these IDs generic to
avoid confusion.

>
>>> +#define UART_IIR_MASK 0x0f /* DesignWare IIR mask */
>>>
>>> -#define UART_IIR_RX_TIMEOUT 0x0c /* OMAP RX Timeout interrupt */
>>
>> You are removing UART_IIR_RX_TIMEOUT? Is this intended?
>>
>>> #define UART_IIR_XOFF 0x10 /* OMAP XOFF/Special Character */
>>> #define UART_IIR_CTS_RTS_DSR 0x20 /* OMAP CTS/RTS/DSR Change */
>>> +#define UART_IIR_EXT_MASK 0x30 /* OMAP extended IIR mask */
>

--
Regards
Vignesh

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