Messages in this thread | | | Date | Wed, 1 Mar 2017 14:24:12 +0530 | From | Viresh Kumar <> | Subject | Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes |
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On 01-03-17, 09:45, Geert Uytterhoeven wrote: > On Wed, Mar 1, 2017 at 7:14 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote: > > On 28-02-17, 09:52, Rob Herring wrote: > >> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote: > >> > This comes from the early design of the generic PM domain, thus I > >> > assume we have some HW with such complex PM topology. However, I don't > >> > know if it is actually being used. > >> > > >> > Moreover, the corresponding DT bindings for "power-domains" parents, > >> > can easily be extended to cover more than one parent. See more in > >> > Documentation/devicetree/bindings/power/power_domain.txt > >> > >> I could easily see device having 2 power domains. For example a cpu > >> may have separate domains for RAM/caches and logic. > > > > An important thing here is that PM domain doesn't support such devices. i.e. a > > device isn't allowed to have multiple PM domains today. So a way to support such > > devices can be to create a virtual PM domain, that has two parents and device as > > its child. > > As clock domains (and their support code) are fairly orthogonal to power > areas, currently our power area controller driver just forwards the > clock handling > to the clock driver (cfr. rcar-sysc).
Perhaps Rajendra can explain better but Qcom have a case where they need to program two power domains as well.
-- viresh
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