Messages in this thread Patch in this message | | | Date | Tue, 19 Dec 2017 18:23:27 +0100 | From | Peter Zijlstra <> | Subject | Re: Regression: unable to boot after commit bd9240a18edf ("x86/apic: Add TSC_DEADLINE quirk due to errata") - Surface Pro 4 SKL |
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On Tue, Dec 19, 2017 at 05:01:55PM +0100, Peter Zijlstra wrote: > On Tue, Dec 19, 2017 at 11:42:41PM +0800, Zhang Rui wrote: > > On Tue, 2017-12-19 at 16:23 +0100, Peter Zijlstra wrote: > > > > [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) > > > [ 0.000000] ACPI: IRQ0 used by override. > > > > > > So your ACPI table has an override for IRQ2 and routes it to IRQ0. > > ^ this > > > > The HPET document says: > > > > > > If the ENABLE_CNF bit and the LEG_RT_CNF bit are both set, then the > > > interrupts will be routed as follows: > > > > > > Timer 0 will be routed to IRQ0 in Non-APIC or IRQ2 in the I/O APIC > > > > But AFAICS, the HPET emulated timer interrupts goes to IRQ0 > > Right, so see that ACPI override, that routes I/O APIC IRQ2 to IRQ0, or > it _should_. > > Clearly something is messed up here.. but I've no idea what. That whole > IRQ routing stuff is confusing.
Does this help?
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c index 749d189f8cd4..45675072771c 100644 --- a/arch/x86/kernel/time.c +++ b/arch/x86/kernel/time.c @@ -69,8 +69,6 @@ static struct irqaction irq0 = { static void __init setup_default_timer_irq(void) { - if (!nr_legacy_irqs()) - return; setup_irq(0, &irq0); }
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