Messages in this thread | | | Date | Wed, 13 Dec 2017 11:50:04 +0100 | From | Maxime Ripard <> | Subject | Re: [PATCH 2/4] arm: dts: sun8i: a83t: Add registers needed for MCPM |
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Hi,
On Mon, Dec 11, 2017 at 08:49:59AM +0100, Mylène Josserand wrote: > Add 3 registers needed for MCPM (ie SMP): prcm, cpucfg and r_cpucfg. > prcm and cpucfg are identical with sun9i-a80. The only difference > is the r_cpucfg that does not exist on sun9i. > > Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> > --- > arch/arm/boot/dts/sun8i-a83t.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi > index a384b766f3dc..eeb2e7d0d6dc 100644 > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi > @@ -323,6 +323,16 @@ > #reset-cells = <1>; > };
> + cpucfg@01700000 {
Please drop the leading zero here, it generates a warning in dtc.
> + compatible = "allwinner,sun9i-a80-cpucfg";
There's some significant differences between the A83t and the A80 IPs, you should use a different compatible.
> + reg = <0x01700000 0x100>;
the size is 1k (0x400)
> + }; > + > + r_cpucfg@1f01c00 { > + compatible = "allwinner,sun8i-a83t-r-cpucfg"; > + reg = <0x1f01c00 0x100>;
You should order the nodes by physical address
> + }; > + > pio: pinctrl@1c20800 { > compatible = "allwinner,sun8i-a83t-pinctrl"; > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, > @@ -493,6 +503,11 @@ > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > }; > > + prcm@1f01400 { > + compatible = "allwinner,sun9i-a80-prcm";
That block is significantly different on the A83t. Please use a different compatible.
> + reg = <0x1f01400 0x200>; > + }; > +
The size is 1k, again.
Maxime
-- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com [unhandled content-type:application/pgp-signature] | |