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    SubjectRe: [PATCH 5/6] x86/mm/kaiser: Optimize RESTORE_CR3
    On Wed, Nov 29, 2017 at 11:33:06AM +0100, Peter Zijlstra wrote:
    > Currently RESTORE_CR3 does an unconditional flush
    > (SAVE_AND_SWITCH_TO_KERNEL_CR3 does not set bit 63 on \save_reg).
    >
    > When restoring to a user ASID, check the user_asid_flush_mask to see
    > if we can avoid the flush.
    >
    > For kernel ASIDs we can unconditionaly avoid the flush, since we do
    > explicit flushes for them.
    >
    > Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    > ---
    > arch/x86/entry/calling.h | 29 +++++++++++++++++++++++++++--
    > arch/x86/entry/entry_64.S | 4 ++--
    > 2 files changed, 29 insertions(+), 4 deletions(-)
    >
    > --- a/arch/x86/entry/calling.h
    > +++ b/arch/x86/entry/calling.h
    > @@ -263,8 +263,33 @@ For 32-bit we have the following convent
    > .Ldone_\@:
    > .endm
    >
    > -.macro RESTORE_CR3 save_reg:req
    > +.macro RESTORE_CR3 scratch_reg:req save_reg:req
    > STATIC_JUMP_IF_FALSE .Lend_\@, kaiser_enabled_key, def=1
    > +
    > + /* ASID bit 11 is for user */
    > + bt $11, \save_reg

    <---- newline here.

    > + /*
    > + * KERNEL pages can always resume with NOFLUSH as we do
    > + * explicit flushes.
    > + */
    > + jnc .Lnoflush_\@
    > +
    > + /*
    > + * Check if there's a pending flush for the user ASID we're
    > + * about to set.
    > + */
    > + movq \save_reg, \scratch_reg
    > + andq $(0x7FF), \scratch_reg
    > + bt \scratch_reg, PER_CPU_VAR(user_asid_flush_mask)
    > + jnc .Lnoflush_\@
    > +
    > + btr \scratch_reg, PER_CPU_VAR(user_asid_flush_mask)
    > + jmp .Ldo_\@

    Can you save yourself one of the BT-insns?

    ...
    andq $(0x7FF), \scratch_reg
    btr \scratch_reg, PER_CPU_VAR(user_asid_flush_mask)
    jnc .Lnoflush_\@
    jmp .Ldo_\@
    ...

    or am I missing a case?

    --
    Regards/Gruss,
    Boris.

    Good mailing practices for 400: avoid top-posting and trim the reply.

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