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    Subject[PATCH AUTOSEL for 4.9 45/52] i2c: riic: fix restart condition
    Date
    From: Chris Brandt <chris.brandt@renesas.com>

    [ Upstream commit 2501c1bb054290679baad0ff7f4f07c714251f4c ]

    While modifying the driver to use the STOP interrupt, the completion of the
    intermediate transfers need to wake the driver back up in order to initiate
    the next transfer (restart condition). Otherwise you get never ending
    interrupts and only the first transfer sent.

    Fixes: 71ccea095ea1 ("i2c: riic: correctly finish transfers")
    Reported-by: Simon Horman <horms@verge.net.au>
    Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
    Tested-by: Simon Horman <horms+renesas@verge.net.au>
    Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
    Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
    ---
    drivers/i2c/busses/i2c-riic.c | 6 +++++-
    1 file changed, 5 insertions(+), 1 deletion(-)

    diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
    index 8f11d347b3ec..c811af4c8d81 100644
    --- a/drivers/i2c/busses/i2c-riic.c
    +++ b/drivers/i2c/busses/i2c-riic.c
    @@ -218,8 +218,12 @@ static irqreturn_t riic_tend_isr(int irq, void *data)
    }

    if (riic->is_last || riic->err) {
    - riic_clear_set_bit(riic, 0, ICIER_SPIE, RIIC_ICIER);
    + riic_clear_set_bit(riic, ICIER_TEIE, ICIER_SPIE, RIIC_ICIER);
    writeb(ICCR2_SP, riic->base + RIIC_ICCR2);
    + } else {
    + /* Transfer is complete, but do not send STOP */
    + riic_clear_set_bit(riic, ICIER_TEIE, 0, RIIC_ICIER);
    + complete(&riic->msg_done);
    }

    return IRQ_HANDLED;
    --
    2.11.0
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